The basic objective in providing an analog to digital converter is to perform the function accurately, rapidly and with minimal expense; one of the important parameters determining the expense is required chip area. Analog to digital converters and analog to digital converters which are capable of operating on charge quanta have been examined in the prior art, see for example, my copending application entitled "Fast Charge Transfer Analog to Digital Converter", Ser. No. 143,704 (Docket Y0979-030) filed Apr. 25, 1980, now U.S. Pat. No. 4,375,059 issued Feb. 22, 1983, as well as the prior art cited therein.
One particular failing of prior art pipelined charge coupled analog to digital converters (at least those including three or more stages) is the requirement that at least one, and perhaps several low order stages be connected to more than one higher order stage. This connection requires excessive real estate and may indeed complicate the chip layout. Concomitantly, one or more low order stages require a substantial amount of logic to generate a reference charge or voltage based on the state of one or more higher order stages. One example of such prior art pipelined charge coupled analog to digital converter is found in Merrill et al Ser. No. 47,557 filed June 11, 1979 and assigned to the assignee of this application.
Another pipelined charge coupled analog to digital converter is described in an article by Tompsett entitled "Video Signal Generation" included in the book Electronic Imaging edited by McLean et al (Academic Press, 1979) at pages 92-94. The Tompsett analog to digital converter uses charge subtraction. Charge subtraction in charge coupled devices, is a time consuming process when compared with charge addition. In addition, charge subtraction is subject to inaccuracies.
Accordingly, it is an object of the invention to provide a relatively simple and compact analog to digital converter which operates in a pipelined mode to rapidly digitize a successive stream of analog signals. It is a more particular object of the invention to provide a relatively simple and compact charge coupled analog to digital converter which operates in the pipelined mode to rapidly digitize a sequential stream of analog charge packets by a process of successive approximation.
Another object of the invention is to provide for a charge coupled analog to digital converter in which not only is the signal charge propagated down the pipeline, but the reference charge is propagated as well and accordingly, only a single reference charge generator is needed. It is another object of the present invention to provide for a pipelined charge coupled analog to digital converter including a plurality of stages, in which processing requires, at any one stage, only information generated from the next higher order stage, and accordingly, the real estate and logic dedicated to interconnecting various stages is minimized.